In general, feature size greater than 500nm is routinely produced by photolithography techniques and for feature size between 500nm and 30nm, electron beam lithography is commonly used. However, feature size less than 30nm is hard to achieved with the above mentioned standard semiconductor lithography techniques. The technical trend of nanolithography shows some novel techniques, such as nano patterning by using diblock copolymer can be a promising candidate.

In this work, we have fabricated dense and uniformly distributed arrays of nano dots on SOI (silicon/silicon dioxide/silicon) surface. SOI substrates were prepared by low pressure chemical vapor deposition (LPCVD) on Si substrates, and cleaned by Pirhana cleaning to remove organic chemicals. Si surfaces with balanced interfacial interactions of polystyrene (PS) and polymethylmethacrylate (PMMA) were prepared by anchoring 3-(p-methoxyphenyl) propyltrichlorosilane (MPTS, CH₃OPh (CH₂)₃SiCl₃, > 95%) to the native silicon oxide layer.

To obtain nano size patterns, self-assembling resists were used to produce a layer of uniformly distributed parallel cylinders of PMMA in a PS matrix. The PMMA cylinders were degraded and removed by acetic acid rinsing, forming a PS mask to transfer the pattern. The patterned holes of PS template were approximately 20 nm wide, 40 nm deep, and 50 nm apart. 100 Å-thick Au, 30 Å-thick Cr, Ni, and Al thin film was deposited by using e-beam evaporator. PS template was removed by lift-off process using N-formyldimethylamine (DMF). As a result, the nano template of PS was analyzed with field emission scanning electron microscope (FESEM) and the sizes of Cr, Ni, Au and Al nano dots left on Si surface were measured by atomic force microscope (AFM). The sizes of metal nano dots were in the range of 17~22 nm.

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