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FinFETs perspectives for high-temperature applications |
Valeriya Kilchytska 1, Denis Flandre 1, Pascal Simon 2, Jean-Pierre Raskin 2, Bertrand Parvais 3, Nadine Collaert 3, Malgorzata Jurczak 3 |
1. Universite catholique de Louvain, Microelectronics laboratory (UCL), Place du Levant, 3, Louvain-la-Neuve 1348, Belgium |
Abstract |
Nowadays multiple-gates transistors are widely considered as most promising candidates to satisfy the semiconductor roadmap requirements of the devices scaling down thanks to the improved control of the channel from multiple gates. FinFET architecture is one of the most developed and promising technological solutions to fabricate multiple-gate devices. While room-temperature analog/RF and digital performance of FinFETs are widely discussed, there are only few publications about their high-temperature behavior, which are moreover focused on the physical/device aspect and do not related to the performance assessment at high temperatures. This paper presents, for the first time to our best knowledge, a detailed investigation of DC to RF FinFETs behavior in a temperature range upto 200°C. We will first concentrate on the analysis of temperature variations of the parameters important for digital applications, such as: on-to-off current ratio, threshold voltage, subthreshold slope. Then, we will discuss the temperature evolution of the parameters important for analog and RF applications, focusing on: transconductance, Early voltage, transconductance to drain current ratio, intrinsic gain, cut-off frequency. It is demonstrated that FinFETs overperform SG FD SOI counterpart both for digital and analog/RF applications, showing better VT and S temperature stability, higher values of Ion/Ioff, intrinsic gain, and slightly attenuated degradation of Gm max, fT and fmax. |
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Presentation: Oral at HITEN 2007, by Valeriya KilchytskaSee On-line Journal of HITEN 2007 Submitted: 2007-07-13 12:18 Revised: 2009-06-07 00:44 |