Results of the application of the LPT (Light Pulse Technique) method to accurately measure the flat-band voltage V_FB value are presented. This method, known for many years, has never been thoroughly tested and brought to practical applicability. We develop this method as an alternative to the commonly applied V_FB determination from the C(V) characteristics of MOS structures. The accuracy of V_FB determination, using the C(V) characteristics is not better than ± 100 mV and the LPT method is expected to assure the ± 10 mV accuracy.

The LPT method consists in illuminating the MOS structure gate with the pulsed UV light beam. The electrical signal u from the structure depends on the semiconductor surface potential Φ_S and changes sign when Φ_S = 0. Hence, the V_FB value is determined by taking the u vs gate voltage V_G characteristic and finding the value of V_G which corresponds with u = 0.

A model allowing correct prediction of the u = f(V_G) characteristic has been developed and a comparison of V_FB measurement results by the LPT and C(V) methods has been made.

The LPT method gives excellent reproducibility of the measurement results and is very sensitive (both quantities are better than ± 10 mV). The V_FB values obtained by both methods are usually close to each other. However, in some cases, differences between V_FB values obtained by both methods were considerable (sometimes exceeding 100 mV). We ascribe these differences to the limited accuracy of the C(V) method, but we can not exclude yet the other factors which may influence the measurements results. This problem is currently being studied.

The next step will be the development of the SLPT (Scanned LPT) method, which should allow determination of the V_FB local values distribution over the gate area of MOS structures. In this case the structure will be scanned by a pulsing UV light beam of small (in comparison with gate dimensions) diameter. Initial results of this kind of measurements are promising.

• Legal notice:
  

  Copyright (c) Pielaszek Research, all rights reserved.
  The above materials, including auxiliary resources, are subject to Publisher's copyright and the Author(s) intellectual rights. Without limiting Author(s) rights under respective Copyright Transfer Agreement, no part of the above documents may be reproduced without the express written permission of Pielaszek Research, the Publisher. Express permission from the Author(s) is required to use the above materials for academic purposes, such as lectures or scientific presentations.
  In every case, proper references including Author(s) name(s) and URL of this webpage: https://science24.com/paper/11698 must be provided.

1. Investigation of flat-band voltage distributions over the gate area of Al-SiO₂-Si structures