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Establishing Methodologies for the Assessment of the Reliability of High Temperature Electronics Packaging Technology

Stephen T. Riches 1Colin Johnston 2Jim Gulliver Mark Langley Robin Pittson Bob Morse 

1. Micro Circuit Engineering (MCE), Exning Road, Cambridge CB80AU, United Kingdom
2. Oxford Materials, Begbroke Science Park, Oxford OX5-1PF, United Kingdom

Abstract

There is a growing desire to install electronic power and control systems in high temperature environments to improve the accuracy of critical measurements and reduce the cost of cabling from remote and hostile locations. Typical applications include down-hole petroleum/gas/geothermal exploration and production and turbine engines for aircraft propulsion and power generation.

This requirement has posed a challenge to the traditional limits of 125oC for high temperature exposure of electronic systems. The leap in operating temperature to above 200oC in combination with high pressures, vibrations and potentially corrosive environments means that different semiconductors, passives, circuit boards and assembly processes will be needed to fulfill the target performance specifications.

Although much attention has been paid to the development of semiconductor devices that can operate at high temperatures, including SOI and SiC devices, robust packaging and reliable interconnections are the key to the success of high temperature electronic systems.

The fundamental change in the approach to enable this step change in temperature performance to be implemented is to switch from the traditional soldered surface mount or through-hole plastic packaged devices assembled onto FR4 printed circuit board materials to bare die mounted onto ceramic, insulated metal or polyimide based substrates that are intrinisically more capable of withstanding the high temperatures without degradation for prolunged durations. The lack of commercially available Pb-free high temperature solders also restricts the options for mounting die and soldering passive components onto substrates. Alternative substrate and interconnection materials are being sought, but there is little information available on their long-term performance at high temperatures and in harsh vibration conditions.

The reliability data built up over many years and enshrined in MIL-HDBK-217 for the operation of electronics systems from -55oC to +125oC do not apply to the operation of electronics at higher temperature, as the failures may be more dominated by diffusion and creep rather than fatigue. The basis of the approach being pursued is to couple the mechanical, electrical and thermal characterisation and microstructural analysis of representative test structures and use modelling to predict how microstructural change alters stress behaviour with time and understand how residual stresses evlove and relax. Ultimately this model will enable not only relevant failure modes to be identified for high temperature electronics, but will also devise highly accelerated test conditions that represent the in-service conditions of the electronics.

This work forms part of the UPTEMP project that has been set up with support from UK Department of Trade and Industry led (DTI) Technology Programme and the EPSRC, which started in March 2007 with a duration of 3 years. The project brings together a consortium of end-users (Sondex Wireline - representing down-well applications, Vibro-Meter UK - representing aeroengine applications), electronic module manufacturers (Micro Circuit Engineering) and material suppliers (Gwent Electronic Materials and Thermastrate) with Oxford University Materials Department, the leading UK high temperature electronics research centre providing the detailed analysis of the failure mechanisms.

 

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Related papers

Presentation: Oral at HITEN 2007, by Stephen T. Riches
See On-line Journal of HITEN 2007

Submitted: 2007-05-12 11:44
Revised:   2009-06-07 00:44