Treatments of semiconductor wafer backside such as deposition of polycrystalline silicon layers or quartz back side damage (BSD) have been used for removing unwanted impurities from the device area already for about 30 years. Solubility of heavy metals in the polycrystalline silicon or in the disturbed backside layer at a high temperature is generally more than an order of magnitude higher than in the silicon substrate. Polycrystalline layer and BSD region are preferably occupied by metals such as copper, nickel or iron and so enhance the gettering capability of the semiconductor wafer.

In this work, gettering capability of silicon wafers with various back side treatments was measured by the Method of Controlled Contamination (MCC) prior and after high temperature annealing. The principle of the method is comparison of haze formed by various metal concentrations. The measurements were carried out on (100) 4” polished silicon wafers heavily doped with antimony. Bare silicon wafers were compared with wafers with polycrystalline silicon layer, BSD, or both.

During the high temperature process the polycrystalline layer partially recrystallizes and thus loses a great part of its gettering capability. Using the MCC we found that its gettering ability after annealing at 1100°C decreased by about 1.5 orders of magnitude. The polycrystalline layer experiences several high temperature steps during the device fabrication process. After each annealing the grain size of polycrystalline silicon layer significantly increases and this results in the loss of gettering sites and consequently decrease in the gettering capability. The solubility of metals in the annealed layer is going to be close to their solubility in the crystalline substrate.

In order to solve this undesirable phenomenon we have developed a multilayer system consisting of a number of alternating polycrystalline silicon – silicon dioxide layers. Utilization of the multilayer system for backside gettering as well as the idea of its function is the subject of US Patent proceedings. Fig. 1 shows the comparison of gettering capability of the common polycrystalline silicon layer and the multilayer system measured by MCC method before and after high temperature annealing (3 hours at 1100°C). The resistance of the multilayer system against the loss of its initial gettering capability due to high temperature annealing is demonstrated and discussed in the paper.

Fig. 1. Gettering capability measured by MCC before and after annealing at 1100°C for 3 hours.

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