The LED industry is aggressively reducing manufacturing costs to compete economically with existing lighting technologies. Currently, the largest factor of the total cost associated with HB-LED manufacture is attributed to yield loss during the MOCVD epitaxial growth steps. One of the biggest contributors to the yield loss is wafer curvature, as it can induce large temperature gradients across the wafer surface.  Critical LED parameters such as emission wavelength, electrical properties, and efficiency struggle to meet ever-tighter target specifications due to the high temperature sensitivity of the alloy compositions and doping levels. The curvature effect becomes even more important for growths on larger-diameter wafers, which is also one of the approaches for reducing the LED costs through back-end fabrication efficiency improvements. Thus, it is very critical to understand the physics affecting wafer curvature and how to minimize it in order to achieve optimal deposition uniformity and yield.

It is well-known that during thin film deposition, the wafer bows due to an intrinsic temperature gradient across the wafer thickness, lattice mismatch (tensile strain) that occurs between the substrate and the film, as well as from thermal expansion mismatch between the film and the substrate. This study focuses on the effect of process conditions, such as growth pressure, rotation rate, gas ambient, total flow rates, and gas inlet temperature, on wafer curvature induced by temperature gradient across the wafer. It will be shown that for transparent substrates such as sapphire, the wafer curvature is mostly dependent upon convective cooling above the wafer surface. A universal equation is derived from dimensionless Nusselt (Nu), Reynolds (Re) and Prandtl (Pr) numbers that can predict wafer curvature for a given process condition and wafer geometry. Predicted results from extensive thermal and flow modeling of various process conditions have shown good agreement with in-situ wafer curvature measurements taken during growth.

It will be demonstrated that convective cooling from the process conditions also defines the wafer-to-carrier temperature difference for a given carrier design. This is another important factor that can adversely affect the yield due to the thermal diffusion effects. The derived equation can be also used to predict relative wafer temperature changes for different process parameters, and has been confirmed by comparison with experimental data.

Differences between sapphire and silicon wafers curvature have additionally been explored. The study is aimed to help understanding how to optimize process conditions and wafer carrier design to maximize yield and optimize film thickness uniformity during MOCVD growth within vertical rotating disc reactors.

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